This invention relates to testing large-scale integration (LSI) devices and memory devices by injecting test signals and comparing the resulting output signals with standards.
In LSI device testing, appropriate test signals, standards, and related format and timing information, for each pin of the device, are preloaded into random access memory dedicated to that pin. During testing, an address generator feeds address signals to the memory to produce the desired sequence of injections and comparisons.
In memory device testing, by contrast, the address generator simultaneously feeds address signals to the device's "address" pins (which thus receive the address signals as test signals) and activates a separate generator which feeds "data" test signals to the device's data pins. Output signals appear only on the data pins and are compared with the data signals previously injected. Although there is random access memory dedicated to each pin, it stores only format and timing information (which typically remains constant for long sequences of test signals) and, in some embodiments, address descrambling information.